SANTA CLARA, Calif.– RISC-V computing firm SiFive introduced the SiFive Intelligence XM Collection designed for accelerating excessive efficiency AI workloads.
That is the primary IP from SiFive to incorporate a scalable AI matrix engine, which accelerates time to marketplace for semiconductor firms constructing system on chip options for edge IoT, client gadgets, subsequent era electrical and/or autonomous autos, knowledge facilities, and past.
As a part of SiFive’s dedication to supporting its prospects and the broader RISC-V ecosystem, SiFive additionally introduced its intention to open supply a reference implementation of its SiFive Kernel Library (SKL).
The announcement was made at a SiFive press occasion on Tuesday, Sept. 17 in Santa Clara, the place executives mentioned the management position the RISC-V structure is enjoying on the core of AI options throughout a various vary of market leaders, and offered an replace on SiFive’s technique, roadmap and enterprise momentum.
SiFive’s new XM Collection presents an especially scalable and environment friendly AI compute engine. By integrating scalar, vector, and matrix engines, XM Collection prospects can benefit from very environment friendly reminiscence bandwidth. The XM Collection additionally continues SiFive’s legacy of providing extraordinarily excessive efficiency per watt for compute-intensive functions.
“Many firms are seeing the advantages of an open processor customary whereas they race to maintain up with the speedy tempo of change with AI. AI performs to SiFive’s strengths with efficiency per watt and our distinctive capacity to assist prospects customise their options,” mentioned Patrick Little, CEO of SiFive. “We’re already supplying our RISC-V options to 5 of the ‘Magnificent 7’ firms, and as firms pivot to a ‘software program first’ design technique we’re engaged on new AI options with all kinds of firms from automotive to datacenter and the clever edge and IoT.”
RISC-V was initially developed to effectively help specialised computing engines together with mixed-precision operations,” mentioned Krste Asanovic, SiFive Founder and Chief Architect. “This, coupled with the inclusion of environment friendly vector directions and the help of specialised AI extensions, are the the explanation why lots of the largest datacenter firms have already adopted RISC-V AI accelerators.”
As a part of his presentation, Krste launched extra particulars on the brand new XM Collection which broadens its Intelligence Product household. The XM Collection additionally continues SiFive’s legacy of providing extraordinarily excessive efficiency per watt for compute-intensive functions. That includes 4 X-Cores per cluster, a cluster can ship 16 TOPS (INT8) or 8 TFLOPS (BF16) per GHz. There may be 1TB/s of sustained reminiscence bandwidth per XM Collection cluster, with the clusters having the ability to entry reminiscence through a excessive bandwidth port or through a CHI port for coherent reminiscence entry. SiFive envisions the creation of techniques incorporating no host CPU or ones based mostly on RISC-V, x86 or Arm.
SiFive will probably be on the RISC-V Summit North America, happening Oct. 22-23, 2024 in Santa Clara, Calif.
